资源列表
mips
- 基于MIPS架构实现的单周期处理器，包含多种基本操作，验证方法是把自己的学号写进连续内存。-MIPS-based architecture for single-cycle processor, includes a variety of basic operations, authentication method is to learn their numbers written contiguous memory.
VHDL
- 一个很系统介绍VHDL学习方法的文档，很有学习参考价值！-A system is introduced, the methods of document study VHDL is learning reference value!
DE2_NETWORK
- 基于Altera公司DE2的network开发程序（verilogHDL）-Altera Corporation DE2-based network development process (verilogHDL)
n2cpu_Embedded_Peripherals
- 学习NIOS2的最好的学习资料，能够了解SOPC的教程资料。建议珍藏，NIOS2初学者必备-NIOS2 study of the best learning materials, can understand the SOPC tutorial information. Recommended collection, essential for beginners NIOS2
LCD_Code
- 其中包含了lcd_8080,lcd_6800的设计测试代码以及说明文档（包含了测试图片）。other_code包含了多种lcd_controller的代码参考设计(Which contains the lcd_8080, lcd_6800 design test code and documentation (including test pictures). other_code contains code reference designs for various lcd_controlle
cpld
- CPLD的指导性学习资料包，快速学会CPLD使用-CPLD guiding learning package, and quickly learn to use CPLD
con_ram_success
- 利用ise中的ip核，实现在任意地址存储和读取数据-In the ise， using ip core, arbitrary address storing and reading data
upsampler
- 一个用VHDL自行编写的完整可行的增采样系统，仅供参考-VHDL with a self-preparation of a complete and feasible by sampling system, for reference only
MULTIPLIER
- A TWO BYTE MULTIPLIER SYNTHESIABLE
shuzizhong
- 实现简易的数字钟信号，由11个部分组成，顶层文件是数字钟。-To achieve a simple digital clock signal, by 11 parts, the top-level file is a digital clock.
at7_ex04
- 通过LED闪烁控制器的代码，使用Vivado工具配置定义一个IP核，在用户工程中可随意添加这个IP核作为设计的一部分，如同Vivado自带的IP核一样方便调用和集成。(Through the code of the LED scintillation controller, the Vivado tool is configured to define a IP core, and the IP kernel can be added as part of the design at rando
dig_clk_lcd
- 数字钟的实现，由LCD动态显示，VHDL语言实现-the realization by the dynamic display LCD, VHDL