资源列表
uart_flash
- 实现UART对flash的控制，利用串口调试助手-UART control of flash to achieve
VerilogSourceCode
- 乘法器、除法器、多路选择器、编码器、BCD码转换、加法器、减法器、状态机、四位比较器、数码管、串口、跑马灯、电子钟-Multiplier, divider, multiplexer, encoder, BCD code converter, adder, subtractor, state machines, four more players, digital control, serial port, marquees, electronic clock
quartusII-FIFO
- 教你如何用QuartusII软件设计FIFO-us QuartusII design FIFO
if-receiver
- 中频数字接收机设计与实现 对中频数字接收机方案的可行性作了分析，并通过系统仿真工具SystemView对A／D，数字下变频(DDC)及AM、FM等调制信号的软件解调作了仿真。-Design and implementation of a digital intermediate frequency receiver
04-NEC_2003_C
- 数字相位测量仪（2003年C题），verilog源程序-digital phase meter Problem C (2003), Verilog source code
AVR_UARTFPGA
- 基于VHDL（verilog）语言的UART的设计与实现。全面模仿AVR的UART功能，与AVR直接实现接口调试。资料全面完整。-Based on VHDL (verilog) Language Design and Implementation of UART. UART fully mimic the function of AVR, and AVR debugging interface directly to achieve. Overall integrity of the infor
ram
- verilog 编写的ram代码，开发环境为quartus-ram write verilog code development environment for quartus
vga_time
- 自己写的vga简单显示，在显示器上显示一个电子时钟-Vga to write their own simple display
V-6-FPGA-Configure-Guide
- Xilinx公司的Virtex-6配置指南，是详细的官方指南-Virtex-6 configuration guide Xilinx company, is the official guide
2222
- 内预测算法优化及几个重要模块的FPGA实现-Prediction algorithm to optimize and in several important modules of the FPGA realizing
vhdl
- FPGA设计应用培训VHDL－RedLogic.pdf-Application of FPGA design training VHDL-RedLogic.pdf
EP2C8Q208SDRAM
- NIOS系统设计的SDRAM控制程序-NIOS system design SDRAM control procedures. . .