资源列表
DE2_70_NIOS_10
- 针对DE2-70的sopc builder 可用于nios的学习。-DE2-70 for the sopc builder for nios learning.
skrypt_bazydany_3temat
- Ja juz nie wiem jak mam to zweryfikowac
HIT_test
- 哈工大的组成原理课程设计，主要是verilog实现20几个常用指令-HIT the composition principles of curriculum design, verilog achieve 20 several commonly used instructions
VGADISPLAY
- 这是一个在FPGA平台下对VGA显示的操作，已经在FPGA开发板上测试通过。-This is an example about VGA display in FPGAS platform,it is tested in the FPGA development board.
EMIFA-WRITE-AND-READ-WITH-CS
- FPGA EP3C16F484C8N与dsp TM320C6748 EMIFA之间的通信程序-the code of communication between FPGA EP3C16F484C8N and dsp TM320C6748 EMIFA
AES
- FPGA Implementation of AES Encryption and Decryption
Timing_Constraints_and_Optimization
- SYSNOSYS公司给的关于数字后端时序分析的资料，对于学习数字设计有非常大的帮助，讲得非常全面-SYSNOSYS company gives back timing analysis on digital information, for learning digital design has a very big help, speak very comprehensive
project_Giovanni_DAliesio
- code for accumulator multiplier
multiplier
- this document describe a 8 * 8 bits mutiplier with vhdl using booth algorithm and shown all parts of implementing this ip by ise software
sin_cos 基于FPGA的CORDIC算法实现
- 基于FPGA的CORDIC算法实现，语言Verilog。8位位宽-FPGA-based CORDIC algorithm, language Verilog. 8-bit wide
shilidaima(Altera_Verilog)
- (Altera_Verilog)示例代码，里面有8个学习FPGA的基础例子-(Altera_Verilog) sample code, there are eight examples of the basis for learning FPGA
timeclock
- 基于FPGA实现的简单的时钟，只具有时钟的基本功能。-FPGA-based realization of the simple clock, only the basic functions of the clock.