资源列表
EP2C8Q208_SDRAM
- 一个基于NIOS的SDRAM开发程序，比较有用-NIOS FPGA SOPC SDRAM
SDRAM
- sdram，在fpga数据传递领域应用广泛，乒乓操作，不同频域的数据传递，都靠sdram来转换。-SDRAM VHDL FPGA FIFO
CycloneIII_EP3C40F780C8_19_PS2_MS
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,PS2_MS 实验代码 -SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE,PS2_MS
dds3
- 有复位的DDS 实现平台为spartan-3e vhdl fpga,输出到led,coe文件由matlab产生-Reset the DDS platform spartan 3e VHDL fpga, output to led coe file from matlab
DVD-ASATRON-3820GA
- firmware dvd asatron
jiaotongdeng
- 使用quartus2实现的交通灯控制，包括各个模块实现及总体实现-traffic light
ram
- 练习调用双口ram,fpga自产生65536个递增数，6.25Hz输出，在20ms内读出。-Exercises called dual port ram, fpga increasing number of self-produced 65536, 6.25Hz output within 20ms readout.
muCPU_final
- 用Verilog开发的多周期CPU,可执行mips汇编中的R\I\J型指令，具有较高的参考价值。-Using Verilog development of multi-cycle CPU, mips executable compilation of R \ I \ J-type instruction, with a high reference value.
exam3
- 对sparten 3E fpga的板子的一个各个功能模块的多功能vhdl程序，包括键盘防抖，数字时钟等-Sparten 3E fpga of the board of a multi-purpose function modules vhdl procedures, including keyboard, image stabilization, digital clock, etc.
Digital_freq_meter
- 数字频率计，具有量程选择按键，超量程报警，采用三位数码管分时扫描显示，频率范围0~10Khz-Digital frequency meter, with the range selection button, over range alarm, using three time-scan digital display, the frequency range 0 ~ 10Khz
EDAshejijianggao2008
- EDA设计是演讲稿有关数字钟 ，结合实验箱-EDA design is a speech about digital clock, combined with experimental box
mycpu1.2
- 一个简单的cpu，包含各个部件，实现基本功能。-Simple CPU, to achieve the basic functions.