资源列表
insert_cword1
- 3G移动通信CPRI协议的实现，插入以太网控制字。-the implement of CPRI of Communication Protocol，insert the control word of Ethernet
audio_codec_controller
- WM8731CODEC, verilog audio codec controller wolfson wm8731 codec control design with vhdl WM8731 wolfson wm8731 audio codec vhdl-WM8731CODEC, verilog audio codec controller wolfson wm8731 codec control design with vhdl WM8731 wolfson wm8731 audio co
Core_fifo_w
- FPGA写FIFO操作,然后把FIFO里的数据送到编码器里编码成PAL格式，输出-write a picture to the fifo odd and evea ,then it can be used to encode into the PAL to display
urisc
- URISC 处理器由数据单元和控制单元组成。数据单元中包含保存运算数据和运算结果的数据寄存器，也包括用来完成数据运算的组合逻辑电路单元。控制单元用来产生控制信号序列，以决定何时进行何种数据运算。控制单元要从数据单元得到条件信号，以决定继续进行那些数据运算，数据单元要产生输出信号，数据运算状态等有用信息。
sqrt
- 平方根算法的硬件描述语言，算法运行速度快，10位二进制数的开方只需要10个时钟周期-Square root algorithm for hardware descr iption language, the algorithm is fast, 10-bit binary number square root only 10 clock cycles
4multiper8adder
- 加法器 和乘法器 包括超前进位的 等等 -Adders and multipliers, including the so-ahead
cnt6
- verilog实现的“六进制约翰逊计数器”。-verilog implementation of the " six hexadecimal Johnson counters."
mod15adder_LIUZHIWEI-
- 模15加法器，能够完成7段译码以及设计了控制器来控制LED的输出-Module 15 adder, to complete the 7 segment decoding and the design of the controller to control the output of LED
I2C_CCD_Config
- I2c_ccd的verilog程序- the verilog program about I2c
FPGA00Verilog
- 该文件能够用verilog语言实现FPGA与电脑的串口通信，高效准确。-This file can use verilog language implementation of FPGA and computer serial port communication.
i2c
- verilog hdl file i2c interfacing-verilog hdl file i2c interfacing
oc8051_tc2
- oc8051的timer2模块，原来的有错误，自己修改的-oc8051 timer2 module, the original error, make changes to