资源列表
rs232
- uart rs232 receiver and transmiter
vhdl实现异步fifo
- 使用vhdl实现异步fifo功能，不占用ram资源，仅占用少量LE资源，且读写计数进行了格雷码转换，使用安全
sqrt32
- verilog源代码，用于开根号计算（32位）-sqrt32.v sqrt of 32-bit integer, Verilog source
vhdl_source
- 函数发生器VHDL语言实现递增，递减锯齿波，方波，正弦波，阶梯波的实现-VHDL， function ,delta, sin, ladder ,isaw dsaw
uart
- 实现串口通信的程序，适合初学者参考和学习。-Realization of serial communication program, suitable for beginners reference and learning.
UART_VHDL
- 特别适用于TI C6000 DSP扩展UART的VHDL源代码。-a VHDL source code specially for TI C6000 DSP to extend UART
bluetooth_latest.tar
- bluetooth_latest.tar.gz源代码-bluetooth_latest.tar.gz source code
arbiter-design-and-verification
- design and verification of arbiter
scr
- 12864显示字符和汉字 ，驱动12864,包括初始化/地址和数据的写 -12864 display characters and Chinese characters, the driver 12864, including the initialization/address and write data
FIFO
- VHDL源代码程序，使用VHDL语言编写，一个FIFO的代码实现工程
chap7
- 几十个经典程序，结构描述的4 位级连全加器，1 位全加器，用条件运算符描述的4 选1 MUX-Dozens of classic procedure, the structure described in the four-level with full-adder, a full-adder, using the conditional operator described in the four selected 1 MUX, etc.
lcd1602
- LCD1602液晶显示应用在FPGA显示-The LCD1602 LCD applications in FPGA