资源列表
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
DE2_SD_Card_Audio
- 这是DE2-35开发光盘的SD卡的例程资料，有需要的可以下载-DE2-35 development of the CD-ROM of the SD card routine information needs can be downloaded
I2C
- 用VERILOG HDL编写的I2C例程，很经典很实用，适用于FPGA开发人员-I2C routines written in VERILOG HDL, very classic and very useful for FPGA developers
ALU
- ALU模块-ALU module
vga_test_313
- VGA显示实验，已测试运行过，学FPGA的朋友可以下下来看看，用ｖｅｒｉｌｏｇ写的-VGA display experiments The under test run school FPGA friends can look down to write with verilog
the_design_basedonfpga
- 1. clkdiv 介绍时钟分频器的建模 2. counter 介绍计数的建模 3. dtrig 介绍D触发器的建模 4. jktrig 介绍JK触发器的建模 5. shiftreg 介绍移位寄存器的建模 6. ttrig 介绍T触发器的建模-The 1. Clkdiv modeling clock divider 2. Counter introduced count modeling the The 3. Dtrig 4. Jktrig introduce the mod
DECADE
- Decade Counter in VHDL using Xilinx tool
ep1c6_29_dds
- 数字调整频率，结构简单，操作性强，准确性高。-Digital adjustment of the frequency, the structure is simple, feasible, and high accuracy.
IS6416
- 本实例是学习fpga的入门程序 希望大家喜欢-This example is the study of entry procedures fpga hope you like
modelsim
- modelsim初级教程，适合初学者-modelsim
design
- static timing analysis and timing paths
CPLD-based-Power-Three-
- 基于CPLD三相全控桥整流电源的论述和应用-CPLD-based Three-phase Bridge Converter exposition and application of power