资源列表
xiayuwen
- 本程序是夏宇闻老师的verilog数字系统设计教程中的E2PROM完整程序文件，包括信号产生模块，E2PROM读写模块，E2PROM模拟模块，并且在ＩＳＥ上运行成功，测试正确，modelsim仿真成功-This program is the Xia Yu Wen digital system design tutorial E2PROM complete file, including the signal generation module, E2PROM reader module, E2P
dianzi
- 电子琴电路设计 vhdl 含有详细介绍波形图-Electric circuit design VHDL contains detailed waveform
clock.rar
- 具有流水灯报点的数字钟实验 含有报告，用VHDL编写,Water at point of light with the number of minutes containing the report of the experiment, prepared by VHDL
Boundary-Scan-Architecture
- 边界扫描技术相关资料，官方说明，含各个模块的介绍。很有参考价值。-Boundary-Scan Architecture
cpu_fsm.tar
- cpu的verilog的不同状态的状态机实现程序编写-write or reset or read or delay of CPU by verilog
FPGA-based-link-layer-chip-S19202-configuration.ra
- FPGA-based link layer chip S19202 configuration
Sensor-experiments
- 传感器实验，用I2C总线，将从温度传感器采集到的温度用虚拟窗口显示出来-Temperature sensor experiment, using the I2C bus, from the temperature sensor acquisition to virtual window is displayed
RAM
- 这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充-This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded
computer8
- 以嵌入式CPU和FPGA为基础的嵌入式系统架构-Embedded CPU and FPGA-based embedded system architecture
divfreq
- 除頻器，用於數位電子乙級考試的時候，將主板上4MHZ的訊號進行除頻的硬體描述語言-Div Freq
CRC校验参考设计_xilinx_vhdl
- 可配置CRC参考设计 xilinx提供的VHDL-configurable CRC reference design for Xilinx VHDL
CRC_xapp562
- crc校验,经验证正确,下载就可直接用,有不足的地方可以指正,