资源列表
digi_clock2.7z
- 數位電子時鐘 用自製圖檔製成 不是用quartusII 內建的圖檔製成 -Digital electronic clock with self-image made of instead of the built-in image quartusII made
8051IP
- 用硬件描述语言写的8051IP CORE-Using hardware descr iption languages written 8051IP CORE
6bit_cymometer
- 使用89C51系列单片机实现6位数显频率计数器（含仿真文件）-89C51 series microcontroller to achieve the significant frequency of the 6-digit counter (including simulation files)
EDA-vhdl
- EDA是电子设计自动化（Electronic Design Automation）的缩写，在20世纪60年代中期从计算机辅助设计（CAD）、计算机辅助制造（CAM）、计算机辅助测试（CAT）和计算机辅助工程（CAE）的概念发展而来的。-EDA is an electronic design automation ( Electronic Design Automation ) abbreviation, in the nineteen sixties medium from computer
Based-VHDL-Fpga-Development
- 基于Altera FPGA/CPLD的电子系统设计及工程实践书籍源代码-Book source code of Altera FPGA/CPLD-based electronic system design and engineering practice
32
- 电子琴程序设计与仿真，vhdl编写，实用！-Keyboard programming and simulation, vhdl to write and practical!
squarer_gdf
- This a code for implement a square root in VHDL, it can be modified for more lenght in data
digital-clock
- 嵌入式FPGA数字时钟，能实现时钟提示，显示功能-The embedded FPGA digital clock,
16qam
- simulink平台上实现16QAM的解调模型，并用XILINX ISE软件实现modesim仿真-Simulink on a platform of 16QAM demodulation models, modesim and XILINX ISE software simulation
yuanchengxu
- 基于Verilog HDL的通信系统设计-Design of communication system based on Verilog HDL
2000JUN23_PL_MEM_CT_AN511
- 可综合的，最高时钟为143MHz的ZBT SRAM接口控制器设计文档。-Can be integrated, the maximum clock of 143MHz ZBT SRAM interface controller design documents.
Verilog
- aes digital audio interface from xilinx