资源列表
behavioural
- simple verilog code for a microprocessor
zy
- 这是一个vhdl的例子 ，可以实现密码锁-This is a VHDL example, you can achieve it locks work
cpu_cache_interrupt
- verilog写的CPU 五级流水 带cache 中断-the the CPU five water with verilog to write cache interrupt
SYNTHPIC.ZIP
- The Synthetic PIC Verion 1.1 This a VHDL synthesizable model of a simple PIC 16C5x microcontroller. It is not, and is not intended as, a high fidelity circuit simulation. This package includes the following files. Note that the licen
serial
- 基于FPGA的控制串行通信源码，里面有详细的源码，并通过调试-serial communication on the basic of fpga including lots of important information，
UI
- 很漂亮的labview UI设计，大家可以下载学习，非常不错，界面美丽，windows 风格
FPGA
- FPGA应用系统的程序开发及发展趋势. -FPGA WAG
ADC0809
- ADC0809的verilog实现 及仿真的文件 和仿真的波形图-ADC0809 implementation and simulation of verilog files and simulation waveforms
fpga1
- HF 14443 RFID读写器FPGA代码，实现读卡器和标签模拟功能,通信速率106Kbps，使用xilinx 飓风二FPGA，miller解码，bpsk编码-HF 14443 RFID reader FPGA code reader and tag simulation capabilities to achieve
FFT_matlab_hdl_code
- FFT 的MATLAB仿真，和Verilog硬件实现-FFT : MATLAB and Verilog simulation
pingpang
- 实现乒乓球计分功能，能过通过指示灯清楚地看到谁得分和各自的比分情况-Tennis scoring function to achieve, can be clearly seen through the light over who score and the score of each
lab3_VHDL
- VHDL数字系统设计和工程实践2，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.