资源列表
xiayuwen_Verilog-HDL
- 夏宇闻版的Verilog习题源程序，带有测试模块，和仿真波形。-examples of Xia Yuwen
circuitDesign_openkey_openfree
- 华为内部电路设计文档，关于同步电路设计 打开密码：openfr-Huawei internal circuit design document, open the password on the synchronous circuit design: openfree
DSSS-Receiver-Sample
- FPGA 上的嵌入式系统设计实例,spartan-3e
CYCLONEIIEP2C35
- DE2开发板的原理图，TERASIC CYCLONE II EP2C35 Development & Education BOARD-DE2 development board schematics, TERASIC CYCLONE II EP2C35 Development & Education BOARD
DE2_CCD_detect
- DC2的用户手册，包括硬件原理图，软件编程程序，班子器件使用方法等-DC2 owner s manual, including the hardware schematics, software programming procedures, the use of devices such as team
DS18B20vhdl-cpl240t105
- vhdl 编写的ds18b20的程序，用在cpld240t105上面-vhdl prepared ds18b20 of the program used in cpld240t105 above
ISE_lab3
- xilinx公司FPGA开发板多路复用器的设计-xilinx FPGA ise
I121-v1.10
- Implementation of Serial Infrared decoder for low-speed IrDA communications.
keyboard
- fpga/cpld按键扫描vhdl语言代码（4x4按键阵列）-Fpga/cpld keypad scanning VHDL language code (4x4 scan)
FIR_SysGen
- system generator 实现FIR滤波器，使用DA分布式算法-Implementation of FIR filter with DA, using system generator
sevensegment
- FPGA-Seven segment and counter
FPGA_BASED_IMAGE_SECURITY
- FPGA based watermarked image security and authentication. I-FPGA based watermarked image security and authentication. IEEE