资源列表
Count-display-circuit-design(VHDL)
- 用VHDL语言设计计数显示电路。设计输出为3位BCD码的计数显示电路。由三个模块构成：十进制计数器（BCD_CNT）、分时总线切换电路（SCAN）和七段显示译码器电路（DEC_LED）-VHDL language to count the display circuit. The design output for display circuit 3 BCD count. Consists of three modules: the decimal counter (BCD_CNT), time
ADC0809
- 用状态机对A/D转换器0809的采样控制电路的实现。工具：Quartus ii 6.0 语言：VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
ILI9225B
- 9225BIC2.0LCD液晶显示屏驱动及功能测试程序-9225B test LCM
3_3matrix_mul
- it si a 3 3 matrix multiplication
Figure_Models
- James Armstrong VHDL Design , source code
pr5
- This is a simple proyect about analog - digital convertion. the analog signal is voltage and the digital are led.
Project12112011
- Program for Code Gerneration
VGA-PX1000
- PX1000是半长的PCI VGA采集卡，可将PC机显卡等图形设备输出的VGA信号（模拟RGB信号），经过高精度的模数转换和相关处理后，通过PCI总线输出给主机-PX1000 is a half-length PCI VGA capture card, the graphics device as a PC graphics card output VGA signal (analog RGB signal), after a high-precision analog-to-digital c
lab3
- VHDL code for using LCD in an fpga project
-SHA-256-AT88SA102S
- sha256在FPGA的实现，SHA256硬件选择AT88SA102S加密芯片-sha256 implementation in FPGA
vhdladc0809
- adcint,是adc0809的采样控制器设计!-adcint is adc0809 sampling controller design!
pseudo-random-number-VHDL
- 伪随机序列发生器的vhdl软件，有m序列和gold序列的算法-pseudo random number generator