资源列表
a_vhdl_can_controller_latest.tar
- implementation of can controller in vhdl/verilog
VHDL_SPI
- 很详细的SPI程序，VHDL代码写的。包含数据接收发送各部分代码。-SPI program, VHDL code written. Contain data transmission and reception of each part of the code.
shiyan
- 三线—八线译码器、数据选择器、数据比较器、二进制编码器、译码器 Verilog 实现
h_adder
- 半加器的实现，利用VHDL语言实现半加器的运算-Half adder implementation using VHDL language and a half-adder operation
luojimokuai
- 一些逻辑门，如与非，异或门的verilog的程序语言设计-The number of logic gates, such as non-exclusive OR gate verilog programming language design
a_vhdl_can_controller_latest[1].tar
- can总线控制器，采用VHDL语言实现实现-code of the can controller in vhdl language
eetop[1].cn_round
- 简单的VGA veliog fpga 测试小程序，显示彩条-a simple vga verilog fgpa test
a_vhdl_can_controller_latest.tar
- CAN 总线的IP核，采用VHDL语言编写。适用各类FPGA-CAN bus IP core, using VHDL language. Apply to the various FPGA
a_vhdl_can_controller_latest.tar
- Can Controller full version
a_vhdl_can_controller_latest.tar
- this code is a vhdl discr iption of CAN(control area network)controller
vhdl_can_IP.tar
- 运用VHDL语言实现的一个CAN通信控制器IP核-Communication of a CAN controller IP core using VHDL language
traffic
- 用FPGA实现交通灯-With the FPGA implementation of traffic lights