资源列表
Xilinx-Interrupt-Core
- 中断控制器，Xilinx公司应用于EDK中-Interrupt Core, Xilinx applied to EDK
Verilog-language--de-CPU
- 基于verilog语言的FPGA开发，平台在QuartusII上，对SDRAM的读写-Verilog language based FPGA development platform on QuartusII, the SDRAM read and write
taxt-jifei
- 程序写的是出租车计费器，有需要的可以看一下-Program written in a taxi meter, there is need to look at
Lockin
- 一个用于锁相环开发的资料，请作为参考！
CLK_3DIV
- 分频模块的设计 三分频 要求占空比为50-The design of the module frequency division three points of frequency requirements than empty for 50
QPSK
- 基于FPGA的QPSK调制解调电路设计与实现 -QPSK
FFT
- 基4的FFT的VHDL实现 基4的FFT的VHDL实现-fft processor
vhdl
- VHDL源码-VHDL source
freq_meter
- freq_meter for amb sysmtem
Shannon-expansion-of-Boolean-logic
- 香农扩展即布尔逻辑扩展，是卡诺逻辑化简的反向运算。香农扩展相当于逻辑复制，提高频率；而卡诺逻辑化简相当于资源共享，节约面积-Shannon expansion of Boolean logic or extension, is simply the reverse Carnot logical operations. Shannon expansion is equivalent to the logical replication, increased frequency and simpl
cfi_ctrl_latest.tar
- 很好的 wishbone转CFI FLASH接口的源码，在INTERL的FLASH上已经调试通过-CFI FLASH CORE
ram_command_reading
- 这是一个由得到的命令(地址)从RAM 中读取命令并送入一个名为FUNREG的寄存器的代码,和前面的MINICORE 可以衔接,属于mikroprogrammbar steuerwerk(可编程的控制器) 与FSM (有限状态机)构成的控制器相对-This is a get command (address) from the RAM read command and sent to a register of FUNREG code, and in front of MINICORE will