资源列表
RGBtoYUV
- BMP格式文件的RGB数据转换为YUV格式。(Transform RGB data of a bmp to YUV.)
aes
- AES FPGA verilogHDL实现(AES hardware implementation)
程序
- 基于18b20单片机测温度，温度误差不大于0.2(Measuring temperature based on 18B20 single chip, The temperature error is not more than 0.2)
Verilog的边沿检测技术_设计源代码
- 波形数据上升下降沿的检测程序，已经经过仿真验证(The detection program of the rising descending edge of the waveform data has been verified by simulation)
dsp
- 程序提供特殊的DSP指令，可以用来快速的实现各种数字信号处理算法。(The program provides special DSP instructions, which can be used to quickly implement various digital signal processing algorithms.)
ahb
- verilog实现AHB总线上的主从控制，在fpga上验证通过(Verilog realizes master slave control on AHB bus and verifies it on FPGA)
FPGA RMII接口实现UDP
- Verilog实现RMII接口UDP网络传输，源代码
32addjiafaqi
- 32位加法器组成原理课程设计，串行进位完成，希望对大家有帮助
adc_1602
- 基于megal128开发的AD模数转换实验-megal analog-digital conversion of AD
div
- 三分频电路，实现三分频，并通过modelsim仿真-Three frequency circuit, the third of the frequency and modelsim simulation
ADC
- AD转换是现在工业中应用十分广泛的一种技术，它可以实现模拟量向数字量的转换，fpga这一快速的器件将有利于数据的处理。-adc0809 vhdl fpga
crk_rscodec
- altera 的reed-soloman codec代码-The reed-soloman codec altera code