资源列表
sdram_controller
- sdram controller written in vhdl and tested
traffic
- 用Verilog语言模拟交通灯实验，内容简单，适合初学者，- Simulation of traffic light experiment using Verilog language
taxi
- 出租车计费器，用以实现出租车计费的小程序，用VHDL编程实现-Taxi meter, used to achieve a small taxi billing procedures, using VHDL programming
1024Mb_ddr2
- DDR2的Verilog仿真代码，可以使用ModelSim仿真-DDR2' s Verilog simulation code, you can use the ModelSim simulation
Binarydivider
- 采用verilog编写的二进制分频器,常用于频率变化场合-Binary frequency divider using verilog prepared, commonly used in the frequency occasions
DATA_get
- 基于Fpga的高速数据采集系统设计，可以利用这个系统高速采集数据。-Fpga-based high-speed data acquisition system design, can be used by high-speed data acquisition.
EP1C3_12_3_VGA
- 基于FPGA的VGA彩条显示程序，共开发VGA的朋友参考。没有采用DA，因此只有8中颜色（输出直接连到VGA的RGB）。其中行、场同步部分用计数器完成。程序用VHDL编写。-FPGA-based VGA color display, with a total development of the reference VGA friends. Did not use DA, only 8 colors (directly connected to the VGA output of the RGB
CM-Goi-[Compatibility-Mode]
- tai lieu chuyen mach goi
fir_lms
- finite impulse response LMS algorithm verilog code
watch
- 懂哥作品 用verilog编写的，我没试验呢开发板没有-verilog watch made by dongge
decoder
- 7位译码器，将整数0到9译码用于LED7位数码管显示-decoder， use for 7-bit LED display
LCDandDS1302
- LCD和1602时钟设计和仿真图,适合初学者-LCD and DS1302digital clock design and simulation map, suitable for beginners