资源列表
8051core
- 8051 VHDL IP Core，有兴趣的可以-8051 VHDL IP Core, who are interested can
fdivision
- 用verilog编写适中分频器 并且还有测试程序-verilog prepared with moderate frequency divider and another test procedures
verilong-2048
- 基于FPGA的2048点FFT的verilog实现的源代码大侠们 看吧-erilogand see the source code based on the FPGA 2048-point FFT verilog
cgra-full
- verilog code for cgra architecture
arm_move
- An effort has been made to design a robot, which loads and unloads an object to the station depending on the request. The sensor connected to the robot will sense the request and initiate the correct sequence of operation. The robot under design has
tcl_io
- quartus 中，自己写的tcl，分配io的例子。
MyLCD
- 基于ALTERA FPGA EP2C5Q208C8，针对LCD RT12864A-1的FPGA驱动程序-based on ALTERA FPGA EP2C5Q208C8,the driver of LCD RT12864A-1
mealymoore
- verilog project for mealy and moore
verilog-master-files
- Verilog master files of AMBA axi interface
bhaswatiml
- matlab code for communication
pisca
- machine with 16 possible states flip flop desmultiplexor language VHDL with fpga cyclone 3
WORDFILE
- VHDL WILE FILE 可以在ue 通用文件-VHDL WILE FILE for ue programing