资源列表
count60
- 基于FPGA的VHDL的秒表计时器程序，希望有助于FPGA初学者。 -I down know。
REMOTE
- orcad schematics for 8051 with rtc and lcd
Coding Styles for if Statements and case Statement
- Coding Styles for if Statements and case Statements
17-Timers
- C8051F040的TIMER可编程计数器的程序，经调试通过-C8051F040 process the TIMER programmable counter, the debugging
te_copy
- 利用verilog编写的频率计，测量信号通过管脚输入，8个七段管显示频率，可以实现1-50M频率的精确测量-A frequency indicator based on verilog HDL, measured signal connect the chip by the input pin and display the result on the seven segment.It could realize the frequency measurement accurately.
1_ADDER
- 实现加法功能,是半加法器，可扩充为全加法器。-Achieve additive function is half adder, full adder can be expanded to.
verhdl95
- vhdl
moonCar
- 实现小车的寻线（白线或者黑线）的代码，如何转向，判断是否偏离路线-Achieve trolley hunt (white line or black line) of the code, how to turn, determine whether the deviation from the route
vga_figures
- information for VGA timing
Verilog code about a VGA based ball and gun game
- This code can be performed directly on the SPARTAN-3A FPGA board as long as a VGA port is connected to this board. After initialization, a ball and gun will appear on the screen and you can control them and playing the game by using the button from t
register
- register designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
yueqvyanzou
- 基于MUXPLUS2的VHDL程序，实现音乐播放，-MUXPLUS2 the VHDL-based procedures, the realization of music player,