资源列表
VHDL-Binary-counter
- Binary counter, its used to count the numbers in binary format
NIOS_SOUND
- 用NIOS II做的声音演示程序,可直接下载做为演示,-用NIOS II做的声音演示程序,可直接下载做为演示!!
verilog_slides
- What is Verilog? ➥ Verilog HDL is a Hardware Descr iption Language (HDL) ➥ Verilog HDL allows describe designs at a high level of abstraction as well as the lower implementation levels ➥ Primary use of HDLs is the simulation
CPLD
- CCD开发板的CPLD图纸，使用XilinxCPLD，供大家参考-CCD CPLD development board drawings, with XilinxCPLD, for your reference
coder8_3
- 8-3优先编码程序，是利用VHDL编写的，自己弄得，上传下-8-3 priority coding process is the use of VHDL prepared herself to look, upload the next
source_file
- 图像传感器数字控制模块，verilog编写，内涵ADC接口，FPGA验证通过。-image sensor digital controller module
Filter_5M
- This zip file contains a 5M filter and its coefficients file.
Counter_LIUZHIWEI
- 同步计数器，利用有限状态机完成,能够完成000-999的加计数以及减计数功能-Synchronous counter which using finite state machine and able to complete the 000-999 plus count as well as the count function.
EDK_IP_ISE
- 最近忙一个EDK的小工程，自己定义个用Create or Import Peripheral 定义了IP，在里面要用到ISE的IP.困扰了一段时间！经过群里、论坛上一些朋友的帮助 终于OK了-EDK little busy recently a project with their own definition of a Create or Import Peripheral define the IP, in which to use the ISE IP. Troubled for some
verilog-code
- verilog代码实例，大量的代码文件对设计文件很好-to many verilog code for design
FPGA-Infrared-remote-control
- 基于FPGA的学习型红外遥控器设计，实现红外接收，红外发送，以及储存功能。-FPGA Infrared remote control
Lab_Code_Solution
- A Basic SoC Platform