资源列表
mimasuo
- 数字密码锁 sjtu 用于教学 basys2板子-digital codelock for SJTU
work1
- 简单的3三八译码器实现，通过vhdl语言实现，6.0下编译仿真通过-Simple 3 thirty-eight of decoder achieved by vhdl language 6.0 compiler through simulation
ac97.v
- AC97音频传输协议的。Verilog语言程序-AC97 Verilog program
rx_tx_module
- RS232串口通讯在的FPGA应用的v原代码-The v original code of the RS232 serial port communication in FPGA applications
zhangxing
- 利用vhdl语言设计的数字钟,能进行正常的时、分、秒计时功能，分别由6个数码管显示24h、60min、60s-Digital alarm clock, clock and alarm functions
uart_tx1
- UART TX spartan 3e starter kit
pinlvji_VHDL
- 可以测量方波的频率，脉宽，幅度。采用VHDL编写。-Can measure the frequency, pulse width, amplitude of the square wave. Written using VHDL.
tongbu_jian
- ＦＰＧＡ在通信上的运用：基于VHDL的同步头“0101010”检测指示模块-Application of FPGA in communication: VHDL based synchronous head "0101010" detection indication module
VHDL_SDH
- 现代光纤通信SDH的VHDL源码，实现SDH开销的接收处理。-VHDL source code of modern fiber-optic communication SDH the SDH overhead of receiving and processing.
lab1
- xilinx spartan-3eEDK实验1源码-xilinx spartan-3eEDK Experiment 1 source
key
- 实现按键操作，在ISE8.2运行，芯片为xinlix的virtex4-Key operation run in ISE8.2 chip xinlix the virtex4
encoder
- 八位优先编码器，是用FPGA写的代码，使用ALTERA 飓风处理器，代码运行速度比较快，验证没有错误-Eight priority encoder, write code using FPGA using ALTERA hurricane processor, code runs faster, verify that no errors