资源列表
SPI_Core.ZIP
- SPI协议的VHDL/Verilog语言实现。-SPI agreement VHDL / Verilog language.
43680540SPI_Core
- Verilog for SPI Core source code
Description-of-DES-with-VHDL
- 用VHDL描述DES算法 用硬件的方式DES加解密 体现了硬件编程人一般思想-DES algorithm using VHDL descr iption of the way with hardware DES encryption and decryption hardware programming reflects the general thinking of people
oscillograph
- 用VHDL编写的oscillograph数字部分源代码，在Altera FPGA上跑通。直接把模拟部分输入输出AD，DA信号接入本模块即可。-Digital oscillograph with the written part of the VHDL source code, in the Altera FPGA on the run-pass. Directly to the analog input and output AD, DA signal can access this modul
test
- DE1开发板基于Nios ii的10秒钟语音录放程序-DE1 development board based on Nios ii 10 seconds voice recording program
VHDL-CODE-for-adder-and-subtractor
- vhdl code for implementation of adder and subtractor on fpga
BEEP
- 蜂鸣器源代码——此代码为蜂鸣器的基础代码，可在此基础上加入LED灯的声光报警系统或蜂鸣器的滴滴声程序-Buzzer source code- the code for the buzzer code base can be added on the basis of sound and light LED light or buzzer alarm system sound program of pieces
can_tb
- verilog codefor can controller
adaptive_lms_equalizer_latest.tar
- In communication systems channel poses an important role. channels can convolve many different kind of distortions to our information. In perticular wireless channels multipath distortion is sevear. and more sevear is such distortion is random.
HASH-code-implementation-using-VHDL
- implementation for Secure Hash Algorithm 1 SHA-1 in vhdl language contain no test file.
m60BCD
- 异步清零多位计数器，应用verilog编程v-counter verilog configuration
8251_8055_verilog
- 8251和8055的verilog源码，可进行综合和仿真，是学习SOC的好资料！-8251 and 8055 verilog the source, and integrated simulation, SOC is a good learning information!