资源列表
cantask
- CAN 测试程序，各功能模块以及顶层测试 仿真-CAN test procedure, the function modules, as well as top-level test simulation
spi
- 该程序是一个可完成订制化的SPI双向总线接口，时钟相位、极性，以及分频比全部可通过寄存器进行配置，已经在ISE下通过综合，占用资源少，强烈推荐 -The program is a complete custom of SPI bidirectional bus interface, clock phase, polarity, and the divider ratio can all be configured through the register, has been in the I
RSdecoder.rar
- cpld/fpga RS(204,188)译码器的verilog程序,cpld/fpga RS (204,188) decoder of the Verilog program
Crack_QII10.0_x86
- Crack Alter Quartus 10.0
RAM_VHDL
- 该文件时RAM的源文件和测试文件以及仿真文件-the document RAM source document and test papers and documents Simulation
IIR-digital-filter-
- 采用双线性变换法设计IIR数字滤波器设计的c代码，包括低通、高通和带通-Document recording the design of IIR digital filter c code
fpga
- 哈工大。计算机设计与实践课程测试FPGA。包括VHDL代码。ucf文件和.bit 文件。-Harbin institute of technology s corse. Computer Design..Homework3.
Assignment7{2010EEY7551}
- design for sortin a system
VHDL
- 带有CDR和曼彻斯特编解码的串行接口，代码编译仿真成功过-Control Link Serial Interface with Manchester and CDR
SVPWM
- 这是一个对电机进行SVPWM调速控制的VHDL源代码程序,包括了rtl主程序和测试sim仿真程序
FPGA_SRAM
- 对sram的读写相对比较简单，本程序方便读者快速掌握在FPGA上对SRAM的读写操作-Sram read and write on the relatively simple, easy to readers to quickly master the program in the FPGA to read and write operations on the SRAM
shifter_8bit
- 利用VHDL语言实现的8bit移位寄存器的设置，可以实现左移或者右移，全部工程都在rar里面，可以直接使用。-Using the VHDL 8bit shift register settings, you can achieve the left or right, all the works are in rar inside, can be used directly.