资源列表
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- vhdl的源文件调试 ！！！！！！！！ flv视频-VHDL source file debugging! ! ! ! ! ! ! ! flv video
1234
- 有一些verilong 如串转并 计数器 编码译码 等程序和大家分享-There are some verilong such as string coding and decoding turn and counter program and share with you all
introduction_to_digital_systems
- introduction_to_digital_systems.rar
stratix_pci_kit-v1.0
- altera PCI总线接口参考设计源代码。使用PCI编译器中的mt64兆核函数实现PCI总线接口-altera PCI bus interface reference design source code. Using the PCI Compiler mt64 trillion nuclear functions for PCI bus interface
hpi
- 用CPLD实现4个C6201通过HPI接口互连的逻辑设计，包含VHDL程序-4 of C6201s through the HPI interface logic design of interconnection with CPLD, including the VHDL program
RS
- 本文设计了基于FPGA的，用verilog HDL语言描述的在伽罗华域GF（ ）上的RS（6,4）编码器。在ISE软件上用verilog HDL语言分别对每个模块进行描述，然后在软件上进行编译、仿真，最终实现RS（6,4）编码，下载之后用chipscope采集数据，分析符合仿真结果，达到设计的要求。(This paper is designed based on FPGA, described by Verilog HDL language in Galois field GF () on RS
s24_uart
- 这是一个串口通信协议，有详细的说明，欢迎下载！-This a code of uart in verilog ，describled in detail,welcome to download!
CPLDjiaocheng
- 主要介绍了关于MAGIC3000系列CPLD开发板的十个实例,如霓虹灯演示、与PC串口通信等。
study
- 在PicoBlaze上实现VGA显示、LED移位、交通灯状态变化等功能-VGA display, LED shift state of the traffic lights on in the PicoBlaze changes
vgaball
- 用VHDL编写的小球游戏代码，用VGA显示，模块对vga控制器有很好的移植性-Written by VHDL balls of the game code, VGA display, module to the VGA controller have very good portability...
Timing_Analysis_in_Quartus
- 影响FPGA设计中时钟因素,Quartus中的延时分析-Timing Analysis in Quartus
sdram_ov7670_vga
- 基于OV7670摄像头的FPGA采集工程,通过VGA显示输出。-OV7670 camera based on FPGA acquisition projects through VGA display output.