资源列表
tx_rx_fifo
- 通过串口将接收到的数据存入fifo,fifo存满后使能串口发送功能，将接收到的数据发送出去(Use fifo to realize the receive and send function of the uart. The function is no problem.)
1
- 基于FPGA的数字视频信号发生器的设计与实现，内有全套源码以及各种配套的图片，内容详尽，绝对真实！
xilinxOFDM
- xilinx OFDM书中的完全代码，可参照其中设计整个OFDM系统-xilinx OFDM complete code book can be designed with reference to the OFDM system which
elevator
- de2-115开发板2人6层电梯Verilog语言实现(Verilog language implementation of de2-115 development board 2-person 6-layer elevator)
11-Verilogblock
- verilog 阻塞幅值和非阻塞赋值的区别讲的不错，可用看看，对初学者很有帮助。-Verilog blocking amplitude and non-blocking assignment about the difference between a good, can be used to see, is very helpful for beginners.
snake
- 自己写的verilog贪吃蛇程序，使用vivado2015.2软件编写综合的，硬件平台是xilinx的basys3平台，当检测到碰撞时，led灯会亮起-Write your own verilog Snake program, using the software to prepare a comprehensive vivado2015.2, the hardware platform is the basys3 xilinx platform, when a collision is det
video_shape_center
- FPGA将二值化的视频提取目标的位置信息，最终计算出目标的型心。-FPGA binarized video extract location information of the target, the final calculation of the target core.
ch6
- VHDL技术基础；第六章；介绍VHDL的宏功能模块以及ip核应用-technology of vhdl；u6
RTS
- state machine example for fpga in vhdl
Vedio_FPGA
- 基于FPGA和SOPC的视频图像处理，视频编解码，系两篇硕士论文，其中一篇需要用CAJ阅读器打开-FPGA and SOPC based on video image processing, video codec, two master' s thesis, Department, of which a reader needs to open with CAJ
ds1302
- 利用DS1302芯片实现RTC（Real Time Clock，实时时钟）功能。驱动DS1302芯片，给芯片赋初始值，并通过LED灯显示DS1302的实时个位秒数（0~9）。-Realize RTC (Real Time Clock) function with DS1302 chip. Drive DS1302 chip, give the chip initial value, and through the LED display DS1302 real-time seconds (0 ~
class11_uart_rx
- 主要使用Verilog代码编程的串口接收程序-Mainly use Verilog code programming serial port to receive