资源列表
phase
- 2012年江苏省电子设计竞赛，测相位差程序。可分辨相位的超前于滞后，经测试稳定可靠！-Electronic Design Contest in 2012, Jiangsu Province, the phase difference measurement procedures. Distinguished phase ahead of the lag has been tested and is stable and reliable!
recive-input-from-standard-keyboard
- FPGA开发板可以接受标准键盘的输入并且将输入的字母现实到数码管上。-FPGA development board can accept standard keyboard input and the input letters realistic digital tube.
zuoye2
- 主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。-Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the prepara
DUAL-PORT-RAM
- vhdl使用双口RAM，工程编译通过。编译工具QUARTUS 9.0。-vhdl using the dual-port RAM, compiled by engineering.
music
- 基于VerilogHDL的音乐播放的设计-Design of Music Playing Based on VerilogHDL
lcd
- 基于fpga的tft液晶驱动，控制器是ILI9325，是verilog写的，16位并口模式，我上网上搜索了很久都没找到的，-Fpga based on the tft LCD driver, controller ILI9325, is written in verilog, 16-bit parallel mode, on-line search for a long time I did not find,
PS2_CTL
- 接受标准键盘输入，全键码显示在数码管，已经验证过确实可用，可放心下载-Accept the standard keyboard input, the whole key code displayed on the digital tube
altera_1c12_test
- 基于FPGA的串行flash读写设计程序源码-Based on the FPGA design of serial flash, speaking, reading and writing program source code
myfft
- 流水线方式的FFT操作，16 点，功仿正确。带测试程序-Pipelining the FFT operation, 16 points, successful imitation is correct. With test procedure
vga_geometry_xps92i_s3_v01_00_03
- Here an embedded System-on-Chip is build, in an Xilinx Spartan-3 FPGA with Microblaze as the processor.A PLB core System is made with the VGA IP core attached to it. The software written for the MicroBlaze processor specifies the object, the color an
two_d_idct_final
- 反离散余弦变换，可以正确实现功能，通过了功能仿真-Inverse discrete cosine transform
IIR_filter
- FPGA实现IIR滤波器功能，采用Verilog程序编写方式来实现！-IIR filter