资源列表
CycloneIII_EP3C40F780C8_13_LCD_Test
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,LCD实验代码-SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE, LCD code
de2_lcm_ccd
- 硬件编写的DE2板CCD驱动程序，非常好用，可为CCD设计驱动提供参考-Prepared by the DE2 board CCD hardware driver, very easy to use, can provide a reference for the CCD design-driven
regfor24
- 这是一个24小时时钟，整体使用verilogHDL编写，六位数码管显示，分为三个模块，分别为扫频模块，计时显示模块，和顶层模块-it s a clock for 24 hours .use verilogHDL to write the project ,it s easy to understand.
jiangsaidaima
- 这是竞赛代码和历程光盘，是学习嵌入式过程中比较简单的几个实例，在xinlinx环境下实现。-This is a contest code and course CD-ROM, the embedded process of learning a few simple examples to achieve in xinlinx environment.
HDLC-Controller---Documentation
- hdlc 编解码 vhdl fpga 说明文档-hdlc encoder decoder vhdl
Process_Algebra_www.softarchive.net
- Research towards meeting the higher demands for higher data rates was the main reason for the birth of an evolution technology towards the 4th generation mobile communication systems. This evolution to the current 3rd generation UMTS systems
2015112208
- 实现8位二进制数的原码一位乘法，并将乘法运算结果通过七段数码管显示(The realization of the 8 bit binary code a multiplication)
DDS
- 用FPGA实现DDS数字式频率合成器（Direct Digital Synthesizer）-FPGA implementation using digital frequency synthesizer DDS (Direct Digital Synthesizer)
usb
- usb数据采集实验，用ft245作为usb芯片用-use usb to send data to computer
test
- wARM体系结构的VHDL设计，研究ARM体系设计很有用-WARM VHDL architecture design, research useful ARM System Design
VGA
- 这是我自己做的一个FPGA控制VGA，800*600*60，用的是20Mhz倍频到40MHz做的-This is a FPGA project using for VGA control
24CIC
- 基于fpga的抽取CIC滤波器设计,采用verilog编写，24抽取,仿真通过-Fpga-based CIC decimation filter design using verilog written, 24 extraction