资源列表
StateCAD独立运行版
- 状态机设计工具，ISE11以后都没有集成了。这个版本可独立运行，不需要ISE
SI4432_TX_192
- 基于FPGA的SI4432无线透传模块的VERILOG工程，测试可用-FPGA-based wireless passthrough module SI4432 VERILOG engineering, testing available
sine
- 用VerilogHDL实现的产生Sine波形全部程序 个人验证后收藏的。
05-vga_module_ani
- vga程序 verilog语言编写 共五个模块 这是第五部分-vga verilog language program which is part of the fifth five modules
nansflash
- NANDFlash存储器作为一类非易失性存储器，具有功耗低、读写快、容量大、成本低、抗震性好等优点而被广泛应用于各种嵌入式系统。 - The NANDFlash memory takes a kind of nonvolatile storage, has the power loss to be low, the read-write is quick, the capacity is big, the cost is low, the anti-knocking property go
ldpc-encode
- 深空通信中AR4JA码编码的研究与实现，ＡＲ４ＪＡ码是ＬＤＰＣ码的一种，文件中是Ｖｅｒｉｌｏｇ语言的硬件实现。-Research and Implementation of the Deep Space Communications AR4JA coding, AR4JA code LDPC codes a hardware implementation of the Verilog language file.
FPGA-clock
- 基于VHDL的时钟设计（de2开发平台），内含源代码，各模块的时序仿真图，结构原理图，以及完成报告。供大家参考学习。-VHDL-based clock design (de2 development platform), contains the source code, simulation charts of each module, structure diagram, and the mission report. For reference study.
S18_UART_IN_HDL
- 带mif文件的，串口模块，verilog编写，经过检验的。-With mif files, serial module, verilog written proven.
DDS_12B
- 基于EP2C5T144的FPGA的12位频率控制字和12位相位控制字的DDS源代码-FPGA-based EP2C5T144 of frequency control word 12-bit and 12-bit phase control word of the DDS source code
xxx
- 这个是介绍很多XILINX比赛的时候，里面很多适用的信息比较使用，-This is to introduce a lot of XILINX game, which compare the use of a lot of applicable information,
FlashROM
- libero环境下FPGA中介绍ProASIC3/EFlash_ROM的仿真例程，-libero FPGA environment described ProASIC3/EFlash_ROM simulation routines,
DE2shijian(5)
- FPGA与SOPC设计教程：DE2实践-第五章 基于fpga的dsp设计-FPGA and SOPC design tutorials: DE2 Practice- Chapter V of the dsp fpga based design