资源列表
clock
- XPS做时钟的配置过程基于EXCD-1开发板,其实是基于xilinx的ISE来开发的，但是开发环境没有这个就这能选VHDL，另外是verilog的，呵呵。希望大家能够真正用上，挺好的“基于ISE的时钟”-XPS to do the configuration process is based on the clock EXCD-1 development board, in fact, is based on the xilinx the ISE to develop, but not the
GPIO_UART_DIPSWITCH_LED
- GPIO_UART_DIPSWITCH_LED 使用Xilinx EDK做出DIPSWITCH控制LED-GPIO_UART_DIPSWITCH_LED make DIPSWITCH control using the Xilinx EDK LED
yiweiLED
- 使用Verilog语言实现LED灯移位功能(Using the Verilog language to implement the LED lamp shift function)
EPM240-entry-based-on-experiments
- 基于 EPM240的入门实验，总共有13个小实验和代码，希望对有需要的朋友有帮助-EPM240 entry based on experiments, a total of 13 small experimental and code, and they hope to help a friend in need
TLC549
- tlc549AD芯片的采样程序，但是基于AD芯片的采样率的限制，最大也就50khz左右-Tlc549AD chip sampling procedure, but the limitation of sampling rate based on the AD chip, the biggest is about 50 KHZ
Pong
- game.rst game.v pong.v game.vhd
Writing-Testbenches-using-System-Verilog.tar
- Writing Testbenches Using SystemVerilog offers a clear blueprint of a verification process that aims for first-time success using the SystemVerilog language. From simulators to source management tools, from specification to functional coverage, from
RadioCom
- Implementation of SDR on FPGA.
modulo-2^n-2^k-1-adder
- 用Verilong语言编写的模2^n-2^k-1加法器，该加法器多用于基于余数系统的蒙哥马利模乘运算。 -Implementation of modulo 2^n-2^k-1 adder Using Verilog.This adder can be use for RNS Montgomery Multiplication
eetop.cn_m8051ew.tar
- M8051EW文档及源代码程序，很难搞到的！-M8051EW documentation and source code, hard to come by it!
EPM240
- 深入浅出玩转FPGA一书的基础实验源代码，采用Verilog描述-FPGA source code
wenduchuanganqi
- 温度传感器DS18B20的程序，经过开发板验证，正确的实现了温度的显示-Temperature sensor DS18B20 program, after development board verified the correct implementation of the temperature display