资源列表
1
- 基于VHDL的设计实验题目 -VHDL design experiments based on VHDL-based design of experiments subject title
EFY-HammingCode
- A vhdl source code for imlpementing hamming code
VHDLipinji2
- 此码基于FPGA开发环境用quartusII软件编写的一个未分模块的整体程序用于测量0-1000kz的频率-This code is based FPGA software development environment, written by quartusII a sub-module of the overall procedure is not used to measure the frequency of 0-1000kz
ps2
- PS2断码和通码的16进制，供大家学习，共同提高，-PS2 break codes and pass codes 16 hex, for everybody to learn and improve together,
generate_fang
- CPLD产生方波函数，可以任意改变占空比，在EPM240上实验通过。-CPLD generate the square wave function, can be changed to duty, in the experiment by EPM240.
vhdl_practical
- vhdl practical book good reference for beginners
EDA
- eda：用VHDL设计一个七段数码管，在led 上显示0——9的数字-eda: VHDL design with a seven-segment digital tube, led display in the 0- 9 numbers
bakema
- eda平台，VHDL语言设计，设计一个巴克码发生器。-eda platform, VHDL language design, design a Barker code generator.
hello
- VHDL语言，设计一个在DE2平台的8个七段数码管上循环显示HELL0的程序，采用按键控制循环的速度，慢速循环时间间隔为1S，快速循环时间间隔为200ms。-VHDL language, design a platform in the DE2 8 segment digital tube display HELL0 program cycle, the speed control loop using keys, slow cycle time interval for the 1S, fas
xuliemajiance
- 本程序为基于verilog HDL的序列码检测器-detector
fashengqi
- 本程序为基于verilog HDL编写的选择器-selector
Desktop
- 基于verilogHDL的程序编译，内为计数器实现0~-counte the number 0~999