资源列表
RunningLED(1)
- 很有用的 希望帮到大家学习vhdl语言 我们大家一起去的进步-Useful to help them to learn vhdl want us to go with the language of progress
3
- 利用fpga控制lcd1602的时序，使液晶工作，能够显示字符。-Fpga timing control lcd1602 use to make the LCD work, to display characters.
4step2iirfilter
- 用VerilogHDL实现一个阶数为4，两个支路的并行IIR滤波器，可以用同样的方法实现更多支路的滤波器。-With VerilogHDL order to achieve a 4, the two branches of the parallel IIR filter, the method can achieve more with the same branch of the filter.
hightfrquencydivider
- 用VerilogHDL语言实现一个被除数为8位，除数为4为的高效除法器，实现高效的除法功能-VerilogHDL language with a dividend of 8 bits, the divisor is 4 for the high divider, a high efficiency of the division function
ddsforsinandcos
- 利用VerilogHDL调用MATLAB产生的数据实现基于DDS技术的正余弦信号发生器，输出位宽为16。-Using the data generated VerilogHDL call MATLAB implementation is based on DDS technology cosine signal generator, the output is 16 bits wide.
verilog
- Verilog HDL 1.红外线发射调制电路 2.分数分频 3.最大公约数和最小公倍数 4.秒表-1.infra transmission modulator 2.fractal frequency divider 3.maximal common divisor 4.timer
LIP1771CORE_i2m_tb
- I2M CORE include i2c, spi slave Module and test bench
LIP1760CORE_dt_decoder
- DT Decoder include RISC16 & RISC32 Decoder Module
LIP2131CORE_dram_controller
- LIP2131 CORE Verilog DRAM Controller
LIP1602CORE_des
- Verilog DES Encrption Module
taxi
- 介绍了一种以单片机为核心的多功能出租车计价器，该计价器采用单CPU结构，具有计量功能、掉电保护功能、语音功能等。文中阐述了系统的硬件及软件结构。-This paper present a new type of taximeter based on single chip microcomputer. In addition to metering the distance, this kind of taximeter have safe memory function, speech fun
clock
- vhdl 数字钟工程文件夹 解压就可以用 quartus ii工程文件 -vhdl digital clock project folder can be used to extract the project file quartus ii