资源列表
DDS-SIN
- 基于DDS原理的幅度，频率可调的正弦波发生器，内含单片机读键盘和1602的显示程序-DDS based on the principle of amplitude, frequency tunable sine wave generator that contains 1602 microcontroller read the keyboard and display program
SRAM
- 语言：VHDL 功能：利用VHDL编程，实现FPGA对SRAMIS61LV24516的读写操作。由于是针对IS61LV24516型号进行读写的，如果不是此型号的SRAM需要对程序进行时序修改。 仿真工具：modelsim 综合工具：quartus -Language: VHDL function: the use of VHDL programming, FPGA on SRAMIS61LV24516 read and write operations. Because it
PN4
- 语言：VHDL 功能：该PN4序列的特点为将一个4位序列的前两位取异或，再让序列左移一位，用异或的结果作为序列的最后一位。序列周期是15，即15位伪随机序列。其中包括序列的产生模块和检测模块。对于误码检测，首先捕获相位。然后，规定测试的码的总个数，统计这些码中有多少个不能满足PN序列特点的，用计数器统计个数。如果发现误码过多，可能是相位失调，重新捕获相位，再进行误码检测。 仿真工具：modelsim 综合工具：quartus -Language: VHDL function:
saa7113
- 次程序为基于FPGA的对SAA7113的串口控制程序，其中使用的是I2C总线传输数据。语言为VERILOG-Second program FPGA-based serial port of the SAA7113 control program, which is I2C bus used to transfer data. Language VERILOG
make-NIOS-elf-FPGA-sof_into-jic
- 将FPGA的硬件配置程序和NIOS产生的软件程序合并，方便下载。-The FPGA hardware configuration program and NIOS software program produced by merging, easy download.
pc_cfr_xmp039
- Xilinx IP核pc_cfr的产品说明，全英文文档，下载前需注意；-product brief of Xilinx ip core pc_cfr
Cordic
- describtif of cordic algo
8051core-Verilog
- 基于FPGA的8051MCU的设计与实现-FPGA-Based Design and Implementation of 8051MCU
led_3_test
- 本源码实现了基于FPGA的3寸OLED的驱动，并能在屏上实现条纹显示和棋盘格显示。所使用开发板是CYCLONE 3,上传源码是整个工程，里面有源程序文件-The source implementation of FPGA-based 3-inch OLED driver, and can be implemented on-screen display and stripes checkerboard display. Development board used is CYCLONE 3, u
stop_watch_with_doc
- vhdl code for stopwatch
RISC_SPM
- 简单risc cpu设计，本人通过书中的代码，又加了一些，已通过仿真。-Risc cpu simple design, I code by the book, but also added some, has been through simulation.
FPGAcodeXYZ
- c骴igo em FPG para RS232