资源列表
4-16.doc
- 4-16译码器，用VHDL编写的，可以直接下载到可编程逻辑器件中-4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device
EDA
- 这是EDA上课用的全套课件，是学习eda课程系统的学习资料！-This is a complete set of EDA courseware used in class is learning the system of learning materials eda course!
New
- VHDL Learning book Very Good
Xilinx_PCIE_DMA
- Xilinx芯片所有关于PCI Express接口的DMA源代码，包含相关的配套的文档资料。-Xilinx chip on the PCI Express interface for all DMA source code, including relevant supporting documentation.
dividerverilogdesign
- verilog 分频器设计 偶数分频器和奇数分频器-divider verilog design even and odd divider divider
Testbench(Verilog)
- verilog验证平台的使用 很不错 很详细 想具体-verilog verification platform is more like using a very good specific
huawei
- 华为大规模集成电路设计原则 很重要的一些设计人需要注意的原则-Huawei' s principles of large scale integrated circuit design is important
filter
- 基于HDL的3*3图像窗口滤波器,实现并行处理，达到图像平滑效果-3*3filter
msl16_vhdl
- It is CPU procesor in vhdl code. made in lithuania by students of europa
unidadcontrol
- Para la unidad de control del algoritmo SHA
MAJ_Function
- Para calcular la funcion MAJ del algoritmo SHA
CH_Function
- Para calcular la funcion CH del algoritmo SHA