资源列表
VGA
- 相关的VGA设计知识与实例。设计时需要的话可以参照参照-VGA related design knowledge and examples
ps2_key_dds_50M
- 利用xilinx开发板，使用嵌入式系统，编写的ps2键盘和利用dds原理产生正弦波的程序-Using xilinx development board, the use of embedded systems, the preparation of the ps2 keyboard and use the procedures dds elements of the sine wave
wb_conmax_latest.tar
- WISHBONE总线的接口实现，采用Verilog完成。能同时连接8个主设备和16个从设备。-WISHBONE bus interface, the use of Verilog to complete. Can simultaneously connect up to 8 masters and 16 slaves.
or1200_wb_ram_gpio_pll
- Quartus ii项目，硬件平台为SOPC2000，能实现LED的各种显示控制及按键输入。包括硬件实现的Verilog及软件实现的C实现。SOPC系统的设计在Windows的quaruts ii 8.0上实现，软件部分在Ubuntu上实现。-Quartus ii project, the hardware platform for SOPC2000, to achieve a variety of LED display control and key input. Including Ver
fpga
- fpga important document to implement in fpga with vhdl language
Xilinx
- 深入详解xilinx fpga结构，是初学者学习xilinx fpga的好工具-Detailed xilinx fpga-depth structure for beginners to learn is a good tool for xilinx fpga
adder
- 用verilog语言描述的二级加法器，通过在ise环境下编译成功。-With the verilog language to describe the two adders, compiled by ise environment successfully.
ssss
- spartan—3a对ddr2读写控制源程序，有verilog和vhdl版本-spartan-3a ddr2 read and write control of the source, there are versions of verilog and vhdl
sp601_MIG_rdf0005_12.2
- spartan—6fpga 用mig生成ddr2接口的ip核，用户可以直接调用此ip控制ddr2-spartan-6fpga generated by mig ddr2 interface ip core, the user can call this ip control ddr2
pwm
- VHDL编写的PWM波控制LED亮度的程序。-Written in VHDL wave PWM LED brightness control procedures.
counter_99
- Verilog实现的倒计数器，从99到1再循环，编译成功，可以直接运行，是很好的verilog语言的例子-Verilog implementation of the down counter, from 99-1 recycling, compiled successfully, you can directly run, is a good example of verilog language