资源列表
VerilogCodingStyle
- This document describes coding styles and guidelines for writing Verilog code for ASIC blocks and test benches.
VHDL_Programming_by_Example
- This manual discusses VHDL and the synario programmable IC solution. This manual is intended to supplement the material presented in the Programmable IC Entry mannual
CrossClock
- This paper explores the fundamentals of signal synchronization and demonstrates circuits a designer can use to handle signals that cross clock domains!
MuxDemux_E1_E3
- E3 -Mux / Demux - Multiplexer of 16 E1 Channels-E3 -Mux / Demux - Multiplexer of 16 E1 Channels
PRBS
- PRBS - Generator and Receiver
MECEditDocument
- 一个很好的基于单片机频率计的程序，希望对用的着的朋友有所帮助-A good frequency meter based on SCM procedures, hope to use a friend' s help
car
- 这是一个基于FPGA语言下的智能小车运行的文件，大家可以看看！-This is a language based on FPGA operating under the Intelligent Vehicle file, we can see!
180
- 基于FPGA的VGA时序彩条信号实现方法及其应用,作者：QQ 64134703 ，电子毕业设计，欢迎咨询-FPGA-based timing of color VGA signal realization and applications of: QQ 64134703, e-graduate design, please consult
RS_Decoder
- RS的解调编码，已经运行过，正确无误，学习使用-RS demodulation code has been run over, correct, learning to use
110
- VGA显示原理与VGA时序实现,作者：QQ 64134703 ，电子毕业设计，欢迎咨询 -VGA display with the VGA timing theory realization of: QQ 64134703, e-graduate design, please consult
109
- VGA时序,作者：QQ 64134703 ，电子毕业设计，欢迎咨询 -VGA timing, of: QQ 64134703, e-graduate design, please consult
85
- 逐次逼近的VHDL开平方算法,作者：QQ 64134703 ，电子毕业设计，欢迎咨询 -VHDL open square successive approximation algorithm, the authors: QQ 64134703, e-graduate design, please consult