资源列表
ucosII_fpga
- ucos 在xilinx FPGA上的移植代码和bsp编写工程-This is a xilinx FPGA ucos and bsp source
compare
- 简单的原理性ROM 存储了地址的反码 可以用LED显示-Simple principle of ROM code memory of the address counter with LED display can be
FPGAclock
- FPGA CPLD重要设计思想及工程应用时钟设计-FPGA CPLD design and engineering major clock design
zhengfumaikuantiaozhi
- VHDL--该程序是自动售邮票的控制电路-Circuit Design for Automatic Control of stamp sale
dingshiqi188
- VHDL--定时器设计-Design of a Timer Based on CPLD
jiaotongdeng
- VHDL--十字路*通灯设计（一组红黄绿交通灯和倒计时设计）-design of luminaire for transportation
dianti
- VHDL——三层电梯控制器设计（控制电梯按顾客的要求自动上下运行）-VHDL--Three layers of the design
eda_files
- 利用SPOC builder 建立系统进而在这个硬件基础之上进行NIOS系统编程实现一些简单的小程序。-it is very easy ,you can leran it very fast.
clock_tb.v
- a verilog code for a clock.
fpgaclockingvhdl
- vhdl based fpga clocking learning material. useful for beginners who want to learn fpga
fpgaclocking
- vhdl based fpga clocking lab material.
chipscopevhdl
- chipscope vhdl implementation examples. fpga development material