资源列表
music_yetong1
- 电子琴加音乐播放功能， 电子琴加音乐播放功能， -music play
lcdtest
- Verilo LCD controller
Basketball
- 此程序是关于篮球计数器的FPGA的代码，用的是ALTERA的板子
simple_divider
- 自己写的一个除法器，网上多是同一个 繁杂难看明白 自己就写了个简单的 并且很容易看懂-Write a except time-multiplier, online is a multifarious ugly understand oneself write a simple and easy to understand
CORDIC_sin_cos
- 基于Verilog语言的cordic算法，算出正余弦的值-Based on the Verilog language cordic algorithm, calculate is cosine value
lcd1602
- 用Verilog写的1602显示程序，很好很强大-With Verilog wrote that program, good 1602 very strong
rs232-Quartus
- 利用verilog語法,來達成串口rs232的功能-Using verilog syntax, to achieve the functions of serial rs232
spi_op_core
- 基于Verilog语言的ＳＰＩ设计 很好的资料 还有文档-ＳＰＩ design ｇｏｏｄ ｔｈｉｎｇ
ISO7816-4
- ISO7816-4,主要是对1-2-3具体实现,行业间交换命令 是编程智能CPU卡的基础-ISO7816-4, mainly for 1-2-3 concrete realization of inter-industry exchange of command is the basis for programming intelligent CPU Card
PCM
- 实现模拟信号向数字信号的转换，，同时编译通过，可使用-Analog signal to digital signal conversion, and compile, you can use
321
- VHDL模为10，范围为0-9，可变模计数器是指计数／模值可根据需要进行变化的计数器。-VHDL model of 10, the range of 0-9, the variable modulus counter is counting/A value can be changed as needed counter.
123
- VHDL电子时钟设计论文，利用一块芯片完成除时钟源、按键、扬声器和显示器（数码管）之外的所有数字电路功能。-VHDL design of e-paper clock, using a complete inter-chip clock source, buttons, speakers and monitors (digital control) than all the digital circuit functions.