资源列表
cam_decode
- cam_decode配置文件用于摄像头采集数据的译码工作-cam_decode design
simple_spi
- complete spi core written in vhdl. its easy to use and can be configured to operate at various clock frequencies. tested on an ADC to verify the operation
Microchip_310806L
- Library Sample for Protel DXP - Maxim
ledflower
- 1.跑马灯设计 设计要求：控制8个LED进行花式显示，设计4种显示模式：S0，从左到右逐个点亮LED；S1，从右到左逐个点亮LED；S2，从两边到中间逐个点亮LED；S3，从中间到两边逐个点亮LED。4种模式循环切换，复位键(rst）控制系统的运行与停止- 1. runs the lantern to design <dnt> the </dnt> design requirements: Controls 8 LED to carry on the floral f
altera_fft
- Alter公司的FFT的IP核源代码，在QuartusII软件中运行-Alter' s FFT of the IP core source code, software running in QuartusII
fifo89
- 先进先出FIFO缓冲器，8位字宽，9位字深，很简易的缓冲器。-FIFO FIFO buffer, 8-bit word wide, 9-bit words deep, very simple buffers.
shuzizhong
- 实现简易的数字钟信号，由11个部分组成，顶层文件是数字钟。-To achieve a simple digital clock signal, by 11 parts, the top-level file is a digital clock.
DDS_Set
- AD9852，DDS芯片接收数据逻辑。（Verilog语言）-AD9852, DDS chips receive data logic. (Verilog language)
ADset
- AD9222接收指令逻辑。（Verilog语言）-AD9222 to receive instruction logic. (Verilog language)
logic
- 多通道扫描AD控制逻辑。Verilog语言编写-AD control logic multi-channel scanning
AtmelFPGAPwm
- atmel fpga pwm implimentation docs
de2sound
- 这个设计结合音频输入从麦克风和线路信号和输出结果线输出信号。麦克风连接话筒端口、音源线在端口,扬声器/耳机线端口。-This design combines audio input from the microphone and line in signals and outputs the result to the line out signal. Connect a microphone to the MIC port, an audio source to the LINE IN por