资源列表
adder
- adder in vhdl , ff , using xilinx ise -adder in vhdl , ff , using xilinx ise
74181ALU
- alu功能。实现计算机的数字运算。运用的是74181芯片-alu function. The number of computer-based operations. Use the 74181 chip. .
15th_counter
- 用VHDL实现15位计数器,可应用于FPGA,ASIC的开发和应用-VHDL implementation with 15-bit counter can be used for FPGA, ASIC development and application of
VHDLseven-segmentdecoder
- VHDL在液晶显示上的七段译码器源码,应用于FPGA,ASIC等硬件设计-VHDL in the seven-segment liquid crystal display on the decoder source code, used in FPGA, ASIC and other hardware design
meanFilter
- This is a variable length window averaging filter that uses an MCP3002 ADC with SPI interface to sample an analog input, and has a PWM that can be run through a low-pass filter to produce an analog output. The design was simulated in Modelsim with no
dds_using_FPGA
- 用FPGA实现的DDS，简单实用，通过调试-Implemented with FPGA DDS, simple and practical, by commissioning
rgy
- 交通灯信号控制器用于主干道与支道公路的交叉路口，要求是优先保证主干道的畅通。因此，平时处于“主干道绿灯，支道红灯”状态，只有在支道有车辆要穿行主干道时，才将交通灯切向“主干道红灯，支道绿灯”，一旦支道无车辆通过路口，交通灯又回到“主干道绿灯，支道红灯”的状态。-Traffic signal controller to the main road intersection with Bypass Road, requested a priority to ensure the smooth flo
chengfaqi
- VHDL24*24位无符号乘法器，采用的是18*18结构-VHDL24*24-bit unsigned multiplier, used in the structure of 18* 18
vcsVHDL
- 用VCS进行VHDL开发的一些文档,很有用的哦-some document for exploere VHDL project with VCS
send
- 串口发送子程序verilog 串口发送子程序verilog -uart send verilog
XC4VLX60MB_Lab5_PROM_ISE91
- XCVLXMB the board Xilinx SRAM_BASED FPGA design is the main element Pieces, SRAM_BASED the FPGA, the design began to verify the results, may experience many changes, this time as long as the JTAG s DOWNLOAD CABLE with the IMPACT software is conti
XC4VLX60MB_Lab3_RS232_ISE91
- FPGA design, In addition to logic design, the future also can be SOC (System On Chip) approach to achieve a future A complete design system, so XC4VLX60 the board design includes RS232 and LCD surrounding the design, this experiment will Super te