资源列表
75_RAM
- vhdl语言写的ARM程序，语法举例使用，实用模块， -ARM program written in vhdl language, grammar, for example the use of practical modules, vhdl language to write the ARM program, the syntax for example the use of practical modules,
vhdl-lizi
- vhdl语言应用举例，例子程序，简单的程序例子，入门者学习用，vhdl语言应用举例，例子程序，简单的程序例子，入门者学习用-vhdl language application example, example program, a simple program example, beginners learn to use, vhdl language application example, example program, a simple program example, beginner
ctr
- 根据时序要求来产生ADC0809正常工作所需的各个控制信号-Timing required to produce under normal working ADC0809 various control signals required for
lcd
- 组合逻辑电路设计：实现9种逻辑运算、6种移位运算以及高低双字节内容互换。 -Combinational logic circuit design: Implementation of 9 logical operations, six kinds of double-byte shift operation, as well as the level of content exchange.
counter
- 带异步复位功能的8位二进制加法计数器的行为描述-With asynchronous reset counter 8-bit binary adder descr iption of the behavior
PWM_DA
- 随着电子技术的发展，出现了多种PWM技术，其中包括：相电压控制PWM、脉宽PWM法、随机PWM、SPWM法、线电压控制PWM等，而在镍氢电池智能充电器中采用的脉宽PWM法，它是把每一脉冲宽度均相等的脉冲列作为PWM波形，通过改变脉冲列的周期可以调频，改变脉冲的宽度或占空比可以调压，采用适当控制方法即可使电压与频率协调变化。可以通过调整PWM的周期、PWM的占空比而达到控制充电电流的目的。-With the development of electronic technology, a varie
vhdl_fir
- 1、输入输出数据宽度为12位， 2、阶数为4阶段线性相位FIR滤波器， 3、类型为：低通。 -1, input and output data width is 12, 2, 4 stages of the order of linear phase FIR filter, 3, type: low pass.
Src
- RS232的接口代码，大家学习一下，=比较实用-RS232 interface code, we learn about, = more practical
ref2
- 这是一个PS2的Verilog代码，我买的一个开发板里面带的，-This is the Verilog code for a PS2, I bought a development board inside the zone,
code
- 这是一个数字跑表的代码，用FPGA实现的，对大家或许有用-This is a digital stopwatch in the code, FPGA implementation, perhaps all of us
CY7c68013_fpga_write_sram
- FPGA和USB经行通讯的源代码，很好很强大，希望对大家有用，-FPGA and the USB line of communication through the source code, nice and strong, we want to be useful, haha
FPGAIIC
- 用VHDL和Verilog两种语言编写的I2C总线程序！以调试通过！-VHDL and Verilog with the two languages of the I2C bus program! To debug through!