资源列表
Proyekton
- alarm clock div clk full adder and half adder
VerilogHDLcxsjjc
- VerilogHDLcxsj-VerilogHDLcxsj
fsk_modem_design
- fsk调制解调器，仿真并FPGA下载测试正确，供大家交流！-fsk modem, simulation and FPGA download the test correctly for all to share!
modelsim-using-guide
- modelsim Altera 5.3的使用教程，适合初学者了解第三方仿真工具。-handbook for modelsim Altera 5.3.It is helpful for learning FPGA.
spi.tan
- vhdl spi cpld fpga cofiguration
spi.sim
- vhdl spi cpld simulation
spi.asm
- vhdl spi port configuration
spi
- vhdl spi pin configuration
shiboqi
- 此为数字存储双宗示波器 内还有C和V程序 非常完整-This is a digital storage oscilloscope were within two-C and V are very complete program
pinlv
- 利用51单片机和FPGA测试频率 精度可测量0.1到10M Hz的频率 包含了详尽的源代码 -MCU and FPGA using 51 test measures the frequency accuracy of 0.1 to 10M Hz frequency of the source code contains a detailed
SPWM
- 用C语言 并利用FPGA来进行SPWM 包含详尽的源代码-Using C language and use of FPGA to be SPWM source code contains detailed
chap7
- Verilog135例，chap3-chap12,初学必备-Verilog135 cases, chap3-chap12, beginner necessary