资源列表
Advanced.FPGA.Design-Steve.Kilts.pdf
- Advanced FPGA design textbook - Steve Kilts Wiley Publications
I2C_master_top
- I2C主机顶层模块（I2C_master_top）的VHDL语言描述-I2C host top-level module (I2C_master_top) of the VHDL language descr iption
vhdl
- 关羽用VHDL语言设计乐曲硬件演奏电路以及研究方案-Guan Yu using VHDL, circuit design, and music playing hardware, research programs
chengxu
- 加法器 比较器verilog hdl 等简单小程序 新手学习中 见谅-Adder comparator verilog hdl Adder comparator verilog hdl a small way as simple novice learning apologize
fpgamatlabverilogcode
- 无线通信fpga设计matlab.verilog代码，具有很高都参考价值，一定对大家有很好的帮助-this code is for verilog and matlab,very helpful.
RedandBlack1979
- 北大poj Red and Black1979 解题源码-poj Red and Black1979 answer
ref-sdr-sdram-verilog
- SDRAM控制器，使用verilog编写-SDRAM controller, use the write verilog
DDR_prj
- DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA。-DDR controller VHDL source code. FPGA implementation using DDR interface controller for Altera' s FPGA.
fifo2
- 异步双时钟fifo，vhdl源代码。基本组成是定制的fifo加上空满判断逻辑，基本功能都有-Asynchronous dual clock fifo, vhdl source code. Fifo basic component is a custom air filled with the logic to judge the basic functions are
PllLogicModel
- 用Verilog语言编写锁相环（PLL）的经典文章，很实用！-Verilog language with phase-locked loop (PLL) classic article, very practical!
FPGA_SDRAM
- FPGA对SDRAM的控制操作源码,用VERILOG硬件描述语言编写,包含的文件一共有:hostcont.v,inc.h,pinouts.ucf,sdram.v,top.v,tst_inc.h-Control of operation of the SDRAM FPGA source code, using VERILOG hardware descr iption language, the file contains a total of: hostcont.v, inc.h, pinout
SEG7DEC
- 七段BCD码显示译码器代码，共阴极LED-Seven-segment BCD decoder source code display, common cathode LED