资源列表
DDS
- vhdl编写的dds信号发生器 这是比较古老的写法，但很简单-vhdl prepared dds signal generator which is a more ancient writing, but it is simple
counter
- vhdl编写计数器，打开可用，有进位 vhdl编写计数器，打开可用，有进位-vhdl preparation counter, open the can, there are binary vhdl preparation counter, open the can, there are binary
clock
- 有时分秒显示，定时功能，24小时12小时转换的时钟vhdl编写-Sometimes, minutes and seconds display, timing function, a 24-hour clock 12-hour conversion write vhdl
bcdseg7
- bcd码的七段数码管显示vhdl程序 bcd码的七段数码管显示vhdl程序-bcd-yard seven-segment LED display vhdl program bcd-yard seven-segment LED display vhdl program
fpga2
- an artical about controller area protocol and fpga device that i found on the net.
Ramzor_4
- example of 4 flashlight benches that i did in my VHDL course. enjoy
cnt4_10
- 用VHDL在FPGA开发板上实现4位十进制计数器 -Use VHDL to achieve 4-bit decimal counter
picoblaze_LCD
- 在Spartan 3e 上实现液晶整屏移动-Display the character in the Spartan 3e and shift the screen moving.
Quartus_II_9.0_SP1_pojieqi
- Quartus_II_9.0_SP1破解器-See the file name
VHDL_Programming_by_Example
- this the best book related to VHDL. it contain lots of examples-this is the best book related to VHDL. it contain lots of examples
VLSI_Handbook
- this is a very good vhdl book. must read