资源列表
liangzu
- 一小段梁祝音乐播放范例的文件，希望对学习verilog的初学者有所帮助。-Butterfly short sample music files, want to learn verilog beginner help.
uart_test
- Test For The Universal Asynchronos Received and Transmitter
uart_tx
- Interface for Transmitter UART
fifo
- First Input Fisrt Output Register
mod_m_counter
- Frequence Divisor for the Universal Received Transmitter
uart_rx
- Universal Asyncronos Received Transmitter
Taximeterproceduresandsimulationwithvhdl
- 出租车计价器VHDL程序与仿真。程序最后包括了程序仿真图和出租计价器程序仿真图。-Taximeter procedures and simulation of VHDL. Finally simulation program includes the program plan and rental pricing program simulation diagram.
Organprogramdesignandsimulationwithvhdl
- 电子琴程序设计与仿真。包括顶层程序与仿真，音阶发生器程序与仿真，数控分频模块程序与仿真，自动演奏模块程序与仿真。-Organ program design and simulation. Including the top-level procedures and simulation, scale generator, procedures and simulation, numerical control program and simulation of frequency module,
ElevatorcontrollerandsimulationwithVHDL
- 电梯控制器VHDL程序与仿真 功能：6层楼的电梯控制系统。包括原理图及仿真结果。-Elevator controller and simulation of VHDL program features: six-story elevator control system. Including schematics and simulation results.
VendingmachinesimulationwithVHDL
- 自动售货机VHDL程序与仿真 功能：货物信息存储，进程控制，硬币处理，余额计算，显示等功能。 说明：显示的钱数coin的 以5角为单位。 -Vending machine simulation of VHDL procedures and functions: cargo information storage, process control, coin handling, balance calculation, display and other functions. Desc
ElectronicClockandsimulationwithVHDL
- 电子时钟VHDL程序与仿真。包括:10进制计数器设计与仿真,6进制计数器设计与仿真,24进制计数器设计与仿真.-Electronic Clock and simulation of VHDL program. Includes: 10 binary counter design and simulation, 6 binary counter design and simulation, 24 binary counter design and simulation.
DAC0832
- DAC0832的VHDL程序与仿真。 目的是产生频率为762.9Hz的锯齿波。-DAC0832 and simulation of VHDL programs. The purpose is to generate the sawtooth frequency of 762.9Hz.