资源列表
8051code
- VHDL源码 8051+IP内核 在xilinx环境仿真运行 不带接口的逻辑部分代码-VHDL source code 8051+ IP cores in the xilinx environment simulation to run without a logical part of the code interface
m2
- i2c buc controller is a connection oriented protocal and it is a serial bus data communication purpose
verilog_k4s643232h_0401
- Samsung SDRAM Simulation Verilog
kuopin_vhdl
- 直接序列扩频的VHDL实现，论文里面提供了较好的源码和方案设计-Direct Sequence Spread Spectrum of the VHDL implementation, research papers which provide a better source and program design
clk_div
- ＦＰＧＡ Ｖｒｉｌｏｇ ＨＤＬ 分频器 输入３３ＭＨＺ ，输出１ＫＨＺ－５０ＨＺ-FPGA Vrilog HDL divider input 33MHZ, output 1KHZ-50HZ
booth_mult
- ＦＰＧＡ的ｖｒｉｌｏｇ ＨＤＬ代码，布尔乘法器-FPGA-vrilog HDL code, the Boolean multiplier
add_tree_mult
- ＦＰＧＡ的ｖｒｉｌｏｇ ＨＤＬ代码，树型乘法器-FPGA-vrilog HDL code, tree multiplier
dsa_code
- Verilog code for synthesis of 8-bit booth multiplier
dsa_report
- Verilog code for the synthesis of an 8-bit booth multiplier
count10
- 基于vhdl语言的10进制的计数器程序，应该有用-Vhdl-based language program for 10 binary counter
con2d
- 基于vhdl语言的2选1的数据选择器的程序-Vhdl language based on data from two selected a program selector
f_provide
- 提供了一个基于FPGA的一个分频程序，采用VHDL编写，其主要作用是提供了一种分频方法-Provides a one-way FPGA-based program, using VHDL preparation, whose main role is to provide a sub-frequency method