资源列表
example6
- 使用 key1 和 key2 来控制数据的加减，通过显示可以看出数据的变化。key1是控制数据加，key2 是控制数据减。可以从 0～9 显示。其中有按键消抖的方法-Key1 and key2 to control the use of the data increases or decreases can be seen by showing the data changes. key1 is to control the data increases, key2 is to control
AudioVolCtrl
- 通过所编写的FPGA程序，对SDI的音频信号最后输出的声音进行控制-Prepared by the FPGA through the procedures, SDI audio signal to control the final output of the voice
example5
- 用 8 个按键对应 8 个数字显示，初始值为 0。按 key1 到 key8 可以显示 1到8 的数值。-With 8 keys corresponding to eight figures show that the initial value of 0. By key1 to key8 can display 1 to 8 values.
example4
- 完成 8 位拨码开关对用 0～255 的数位显示。拨码开关从1～8 对应个高位到低位，数码管对应显示 0 到 255 的数值。-8-bit DIP switch 0 to 255 with digital display. DIP switch from 1 to 8 corresponds to a high to low, digital tube display corresponding to 0 to 255 values.
AudioVMix
- 通过SDI信号的行同步，列同步和场同步，并通过对行和列的像素点进行计数限制来输出处理后的SDI数据-SDI signal through the line of synchronization, the column sync and field sync, and through pairs of rows and columns of pixels counted restrictions to the SDI output of processed data
example3
- 实现一个加/减8进制计数器。其中包括时钟输入、使能信号、加减控制信 号、复位信号、三位输入和一位进位位。-To achieve a plus/minus 8 binary counter. These include the clock input enable signal, addition and subtraction control signals, reset signals, three inputs and a carry bit.
example2
- moore状态机程序 一共有四个状况，空闲 idle 等待 ready 信号准备好后进入判决状态 decision 否则继续等待 ready信号；判决状态 decision 中将 oe、we 信号置低，同时根据read_write 判定下一个状态是读状态 read 还是写状态 write；如果 read_write 为‘1’读状态 read，否则写状态write；读状态将oe 置高，we 置低；写状态将 oe 置低，we 置高。-moore state machine processes a
example1
- 实现将时钟信号clk十分频的功能，可通过波形仿真来看效果。-To achieve the clock signal clk is the frequency function is available through the waveform simulation to evaluate the effects.
altera_mf
- 高清或标清SDI信号，通过编写的FPGA的Audio程序进行处理。-HD or SD SDI signals, through the development of the FPGA-Audio procedures.
sensortest
- 光线传感器测量: LED会显示环境光的大小，用手挡住光线传感器，LED的显示值会相应减小。-Light sensor: LED ambient light will show the size, hands blocking the light sensor, LED display the value of a corresponding decrease.
PWMtest
- PWM 转模拟信号 拨码开关控制 PWM 的占空比为16级，分别对应电压3.3伏16分之一的倍数-DIP switch to an analog signal PWM switch control PWM duty cycle is 16, corresponding to voltage of 3.3 volts, one of the 16 sub-multiples
test
- 将拨码开关全部拨到on，将会看到数码管从0-9 A-F逐个显示；按下8个按键中的任何一个，对应的LED灯会亮,按第一个按键时，蜂鸣器会响。-All appropriated for the DIP switch on, will see the digital tube display one by one from the 0-9 AF press 8 keys in any one, the corresponding LED lantern light, according to the