资源列表
verilog_EXAMPLE_100-
- 产用的Verilog语言设计实例，适合初学者，代码通过验证。包含PCI、i2c等-Production design example Verilog language, suitable for beginners, through the verification code.Contains the PCI, i2c, etc
DDR2_VERILOG
- 基于FPGA的DDR2_SDRAM的实现Verilog代码，比较实用，经过仿真验证。-Based on the FPGA implementation of DDR2_SDRAM Verilog code, more practical, proven by simulation.
SSRAM_250M
- 本人编写的SSRAM高速读写工程，工程中包含了NIOS软核，利用Quartus的TimeQuest工具进行了时序约束，上班调试最高读写速率可达250MHz。-I write the SSRAM high-speed, speaking, reading and writing, engineering includes NIOS soft core, timing constraint is studied by using Quartus TimeQuest tools, work to de
SSRAM_by_Verilog
- ssram读写接口设计的详细资料，具有指导价值。包括了主要的读写源代码和时序图。-Details interface design of reading and writing of ssram，it have guidance value.Including the main source code to read and write and sequence diagram.
CAN_Verilog
- CAN协议控制器，用verilog语言详细描述CAN协议，同时还有can测试程序 -CAN Protocol Controller
UART
- uart程序包含了串口的VERILOG程序以及测试代码-The program contains the serial uart VERILOG program and test code
usb
- 本文包含了USB的verilog程序及测代码-This article contains a USB verilog code and testing procedures
vga
- 本文包含了VGA的verilog程序及测代码-This article contains a VGA verilog code and testing procedures
CANBUS
- 本文包含了CAN的verilog程序及测代码-This article contains the CAN verilog code and testing procedures
traffic-light-design
- 基于ISP的交通灯设计，实现了各路状态转换、警察控制、行人请求功能。-ISP traffic light design, to achieve the brightest state transitions, police control, pedestrian request feature.
frequency
- verilog编写的双量程频率计及仿真测试程序，采用500MHz系统时钟-verilog prepared dual-range frequency meter and simulation test program, using 500MHz system clock
frame
- verilog编写的帧同步检测代码及仿真程序。帧信息序列用伪随机码表示，同步码为100110-frame synchronization detection code written in verilog and simulation procedures with frame information using a pseudo-random code sequence, and synchronization code 10011011