资源列表
ADDA_restored
- 黑金开发板ADDA程序 VERILOG-Black gold development board ADDA program VERILOG
fpga_usb_serial_20111004.tar
- usb 2.0 functional code
bt1120p_gen
- bt1120时序生成，verilog程序，1920x1080p60分辨率-synchronized video timing generation itu bt1120 within verilog program, 1920x1080p60 resolution
project_face_vga_0219
- 使用FPGA控制投影仪的VGA和HDMI投影条纹，同时相机同步采集-FPGA to control the projector using the VGA and HDMI projector stripes, while the camera synchronous acquisition
fsmc
- 修改过的icore2复用模式ARM与FPGA FSMC接口 Verilog的-Modified icore2 multiplexed mode ARM and FPGA FSMC Interface Verilog s
multifunction_digita
- 基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码，其功能主要有：时间设置，时间显示，跑表，分频，日期设置，日期显示等-There FPGA-based design and implementation of multi-functional digital clock containing detailed Verilog HDL source code and its function are: time setting, time display, stopw
Verilog-RS232
- 本程序是在FPGA里面模拟RS232串口，并在已调试成功。-This procedure is simulated in FPGA RS232 serial port, and in the debugging success
counter
- 一个可选择的递增和递减的计数器，并进行了仿真验证-a counter can increase and decline,and simulation the function of the counter
2009511191253884-(1)
- 基基于fpga的1602点灯程序的源代码 于fpga的1602点灯程序的源代码- Kiki on fpga 1602 fpga lighting source code 1602 based lighting source code in fpga 1602 lighting source code
counter_16
- 基于ISE14.7开发的模16的计数器，使用的FPGA开发板为Spartan 3E Start Kit-Based on the development of mold counter ISE14.7 16, FPGA development board used for the Spartan 3E Start Kit
acdc_fpga
- 用于测量两个正弦信号之间的相位差，然后通过bus总线与430通信。-phrase bus
CoG
- Semi-functional FSM and ROM for Xilinx CPLD to drive ST7565R based off Digikey example