资源列表
dds
- 基于vhdl 和DDS 的直接频率合成程序，并产生正弦波-Vhdl and DDS-based direct frequency synthesis process and generate a sine wave
ADC_DAC_V2.0_EP2C35Q240C8
- 基于vhdl的AD DA 高速转换，EP3C25Q240-Based vhdl of AD DA conversion speed, EP3C25Q240
LCD-1602
- 基于vhdl的lcd1602的显示程序，-Based on the lcd1602 vhdl display program,
pcm_read_cmd
- 对于NEXYS3开发板，对于PCM 的读操作时序-the time of reading PCM on NEXYS3
pcm_unlock_rdreg_prog
- 在NEXYS3开发板上，对于PCM的写操作时序-the time of programming PCM on NEXYS3
bing-to-cuan
- 基于VERILOG的并行转串行程序-Based on the parallel to serial procedures VERILOG
LED
- led的verilog试验，在spandIII上的开发试验-led the verilog test on the development and testing spandIII
vmodcam-ref-vga-demo-12
- 通过fpga（注：xilinx公司的板子）从vmodcam取数据并用vga显示。-vmodcam ref vga demo
vmodcam-ref-hd-demo-12
- 通过fpga控制从vmodcam中获取视频数据并通过vhdmi发送到显示屏上-And sent via fpga control access to video data from vmodcam on display through vhdmi
vmodcam-ref-hd-demo-13
- 通过fpga控制从vmodcam中获取视频数据并通过vga发送到显示屏上2-Fpga control access to video data from vmodcam and send to the display via vga 2
camera-code-fpga
- 一个简单的摄像机代码，通过fpga控制，通过vga显示到显示屏上-A simple camera code, through fpga control, displayed on the screen via vga
Atlys_Demo_BIST_Clean
- 用于atlys—spartan-6板子的自测的一个样本代码.以便板子启动-A sample code for atlys board self-test