资源列表
yufafenxiqi
- 该程序能求出任意给定的文法的所有非终极符和终极符的first集，所有非终极符的follow集，所有语句的select集，能求出能导空的非终极符集合。给定任意字符串该程序能判定出是否能接受。由于空符号不好输入，在程序中用到空符号全部用@表示。-The program can calculate any given grammar of all non-ultimate breaks and the ultimate symbol of the first set, all non-ultimate
8.3-LCD-control-VHDL-program
- 功能：FGAD驱动LCD显示中文字符“年”。-Function: FGAD drive LCD displays in Chinese characters " years."
uart
- u art setting program used for microcontrollers atmel series
The-use-of-VHDL-divider-design
- 分频器的各种设计方法， 及源代码，源代码中完成对时钟信号CLK的2分频，4分频，8分频，16分频。-The use of VHDL divider design
Digital-Design-and-Computer-Architecture-VHDL
- 《数字设计和计算机体系结构》一书MIPS VHDL源码。
pingpong
- pingpong Game (1player,2user(left user,right user) It s operated to display on Monitor to use Graphic Digit Font. ps) not working score digit and 2 players
sine_pwm_gen
- Sine PWM Generator for a sine frequency of 0..255Hz. Signal to a two phase mode is available-Sine PWM Generator for a sine frequency of 0..255Hz. Signal to a two phase mode is available
Lvbo
- 实现信号滤波，可根据外部信号毛刺干扰的特点改变滤波时钟来改变滤波宽度-Achieve signal filtering, the filter can be changed according to the characteristics of the external clock signal glitch to change the filter width
LIBRARYIEE1
- 译码器，将八位输出转换为七段译码显示，相当于7448驱动译码管-Decoder, the 8 output is converted to seven segment decoding shows that the equivalent of 7448
traffic
- 交通灯，通过程序设置一定的时间后，通过quartus编译下载到FPGA上，实现交通灯的功能-traffic light,which was used by program,then,set the time ,it can work as a true traffic light.
PLL
- 在同步控制上，应用了“优先与抢占”的方式产生同步信号，纯硬件实现，简单可靠；使用了成熟的数字锁相环来跟踪同步信号。-A strategy of synchronization control, which combines competition coequality and priority, is mentioned in the paper and uses digital phase-lock loop to track synchronization signal
uart-VHDL
- uart-VHDL 带奇偶校验位 比特率为1152-uart-VHDL add parity check bit rate is 115200