资源列表
MCU_FPGA_Interface
- msp430单片机用IO口模拟总线时序，与FPGA进行交互的程序，附源代码，verilog，有简单文档。-msp430 I single-chip analog IO bus with timing, with the FPGA interactive process, with the source code, verilog, a simple document.
cpu16
- Verilog下描述16位CPU，虽然有点简单，但具有一定的可读性，内附夏宇闻老师的8位CPU文档-Verilog descr iption of 16-bit CPU, though a bit simple, but with a certain degree of readability, XIA Yu-Wen teachers containing 8-bit CPU Documentation
usingUART
- using uart in fpga.how can use the uart and implemented in spartan-3e development kit
lcd12864_5
- 可以在lcd12864上进行显示字和显示图像的立即转换。-Lcd12864 can be displayed on the display images of words and the immediate conversion.
cordic
- 基于CORDIC算法的指数函数生成器的各种理论基础，通俗易懂-CORDIC algorithm based on exponential function generator for a variety of theoretical basis, user-friendly
VHDL
- 运用VHDL描述函数发生器的各个波形，可有构成多功能函数发生器。-VHDL descr iption of the use of various function generator waveforms, can constitute a multi-purpose function generator.
control_cs5550
- 基于FPGA高精度数据采集系统，采用cs5550高精度AD芯片，本程序主要实现对cs5550的控制。-FPGA-based high-precision data acquisition system, using high-precision cs5550 chip AD, the procedures for the main control on the cs5550.
divclock
- 基于VHDL的各种分频器的设计。很好用，可修改成各种通用分频器-VHDL-based design of the various divider. Very good, and can be modified into a variety of common divider
verilogsigma-deltaadc
- 用verilog编写的sigma-deltaADC的源程序。-code of verilog for sigma delta ADC
ADCSAMPLEVHDL
- 用VHDL编写的ADC的采样器，可以下载到FPGA里面。-sampleor of ADC
Verilogdigitlefilter
- 用verilog代码实现在数字滤波器，可以综合。-verilog code for digital filter